1. Field of the Invention
This invention relates generally to data processors and more particularly to a data processor suitable for processing signals which occur in real time.
2. Description of the Prior Art
Data processors which execute a plurality of instructions stored in a memory are well known in the art. Generally the instructions are stored in consecutive memory locations, and the instructions are executed in the order in which they are stored. The manner of executing consecutively stored instructions can be altered by the software itself, as for example, when a jump, branch, or jump-to-subroutine instruction is executed. However, the execution of consecutively stored instructions may also be altered by a hardware interrupt, as for example when some external event occurs which causes an input to the data processor to change state. Generally when the hardware interrupt occurs, the data processor stops executing the group of instructions which it was previously executing, and the data processor is redirected to a different group of instructions which are specifically related to the occurrence of the external event which caused the interrupt. However, there will be certain times at which it is undesirable for the data processor to be interrupted as, for example, when the data processor is already busy handling a prior interrupt. For this reason, data processors often include masking circuitry for selectively enabling or disabling one or more interrupts during those times when it is desirable or undesirable, respectively, for the data processor to recognize the interrupt.
A problem which arises when interrupts are not immediately recognized is that the time at which the interrupt occurs may be critical in determining the action to be taken by the data processor; yet, because the recognition of the interrupt is deferred, and because the external event occurred in real time, the data processor has no record of the time at which the interrupt occurred.